With the advent of new nanotechnology techniques over the past few years, it is becoming possible to produce materials with nanoscale features that have new and useful optical, electronic, and other properties. For example, nanoscale structures embedded on the surface of a semiconductor or other substrate and made of a material different from the substrate may be useful in a variety of applications including as contacts, interconnects, and gates in nanoelectronics integrated circuit technology; in the formation of advanced transistors from conductive and semiconductor nanostructures; as sensors, especially high temperature sensors; as nanoscale templates for building other nanostructures; as photoluminescent devices; as infrared detectors; as a method of examining crystalline wafers; in the nanofabrication of high density nanostructures of high aspect ratios; as patterned nanostructure catalysts and photocatalysts; as field emission display panels; and for generating optical harmonics from the nanostructures. It is also becoming possible to make other nanoscale structures such as nanowires that may be useful in a variety of applications including as infrared detectors; photoluminescent devices; and patterned detectors and emitter arrays.
Currently, two general methods can be used to make nanostructures on crystalline substrates.
The first method deposits atoms on a substrate and allows them to react with the substrate to make lines of one-atom width. This method is extremely difficult to perform because individual atoms have to be deposited onto the surface. Therefore, the location of those atomic lines is difficult to control. More importantly, the structures so produced are limited in their width and may not possess the required properties, such as being electrical conductors. It is also impossible to form multiple component crystalline wires because the width is only one atom wide.
A second method employs thin film deposition (one-step or multiple-step deposition (Dass et al., 1991 APL), and high energy ion implantation (White et al. 1987 APL)) followed by heating (laser (Tung et al. 1983 APL) or other methods of heating). Depending on the thickness of the films deposited on the substrate, either small particles are formed and then converted into metal silicides (when the substrate is silicon) or the thin films are directly converted into metal silicide films (when the substrate is silicon). Lithography is then used to make micro-structures. There are several drawbacks associate with these thin film methods. First, the location of the structures produced is random, depending on where and how the thin films are broken. For example, thin films may break down into particles of different sizes, which may lead to the production of differently sized structures. Since the average size of thin films determines the structures produced subsequently, extremely thin films are needed to make nanometer sized structures. Second, thin film deposition is usually preformed in high vacuum, making it difficult to operate and more costly. Third, the width of lithographically produced nanostructures is more than tens of nanometers, too large for future nanoelectronics.
These existing methods of making nanostructures have substantial drawbacks in making nanostructures useful in the applications listed above and there is a need for methods of producing nanostructures that are capable of accurately controlling the size and morphology of the nanostructures, producing nanostructures of a variety of sizes, and working without the use of high vacuum.
Several methods have been developed to make nanowires, particularly Si nanowires, and most of them need to provide Si in the gas phase, normally in the form of silane (SiH4). Yan et al. (Jour of Crystal Growth, Vol 257, p69 (2003)) reported the growth of thick (100-200 nm diameter.), short, and straight Si nanowires from H2, SiH4, and Au—Pd alloy films deposited on Si wafers. Hu et al. (Chem. Phys. Lett. Vol 378, p299 (2003)) use high temperature furnace (1350 C) to evaporate Si to form Si nanowires (20-1000 nm in diameter.). Laser ablation of silicon at high temperature furnace (1200 C) has also been used by Tang et al. (J. Vac. Sci. Technol. B 19(1), p317 (2001)) and of silicon and metals by Morales et al. However, the nanowires by laser ablation are highly curved. Silane and Ti catalysts have been used to make Si nanowires by Kamins et al. (Appl. Phys. Lett., Vol 82, p263 (2003)). Au nanoparticles and diphenylsilane are used by Holmes et al. to make Si nanowires (Science, Vol 287, p1471 (2000)). In other cases (e.g. Kim et al. Chem Commun, p256 (2003)), low melting solids such as Ga have been used together with Si substrate and H2 to induce the growth of Si nanowires. Although no silanes are used, this method lacks the control over the locations of the nanowire growth.
These existing methods of making nanowire have substantial drawbacks in making nanowires useful in the applications listed above and there is a need for methods of producing nanowires, particularly Si nanowires, that eliminate the use of silanes and provides control over the location of the growth, and the size and homogeneity of the nanowires grown.